The implications of silicon chip, micro-electronic technology for architects
dc.contributor.author | Webley, Mark | |
dc.date.accessioned | 2011-07-03T23:53:33Z | |
dc.date.accessioned | 2022-10-26T22:36:51Z | |
dc.date.available | 2011-07-03T23:53:33Z | |
dc.date.available | 2022-10-26T22:36:51Z | |
dc.date.copyright | 1980 | |
dc.date.issued | 1980 | |
dc.description.abstract | An investigation into the implications of silicon chip microelectronic technology for architects. An introduction to the silicon chip is followed by analysis of the pressures to adopt the new technology. Changes, unemployment and survival in the profession are examined, then factors for change and objective constraints in New Zealand are outlined. A broadening of the study follows, looking at social and political issues facing architects. These issues are highlighted as being of major concern once the easier and more technical adjustments to the new technology are completed. | en_NZ |
dc.format | en_NZ | |
dc.identifier.uri | https://ir.wgtn.ac.nz/handle/123456789/25097 | |
dc.language | en_NZ | |
dc.language.iso | en_NZ | |
dc.publisher | Te Herenga Waka—Victoria University of Wellington | en_NZ |
dc.subject | Microelectronics | |
dc.subject | Architectural design | |
dc.subject | Miniaturization | |
dc.subject | Architecture | |
dc.title | The implications of silicon chip, micro-electronic technology for architects | en_NZ |
dc.type | Text | en_NZ |
thesis.degree.discipline | Architecture | en_NZ |
thesis.degree.grantor | Te Herenga Waka—Victoria University of Wellington | en_NZ |
thesis.degree.name | Bachelor Of Architecture | en_NZ |
vuwschema.type.vuw | Bachelors Research Paper or Project | en_NZ |
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