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Variance reduction techniques in the simulation of digital systems

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dc.contributor.authorChen, Song-Xi
dc.date.accessioned2011-06-21T01:57:22Z
dc.date.accessioned2022-10-26T21:25:15Z
dc.date.available2011-06-21T01:57:22Z
dc.date.available2022-10-26T21:25:15Z
dc.date.copyright1990
dc.date.issued1990
dc.description.abstractImportance sampling has been widely used as a technique to reduce run-time in the simulation of digital systems. It is well known that the effects of importance sampling can be reduced in the presence of system memory (eg. systems employing a Viterbi decoder). This paper presents some modifications to conventional importance sampling which give improvements when system memory is present. Also a new technique of implementing importance sampling in burst is developed and the effects of this burst weighting scheme on the simulated systems employing Viterbi decoding is analysised. The use of control variables is also introduced as an additional variance reduction technique.en_NZ
dc.formatpdfen_NZ
dc.identifier.urihttps://ir.wgtn.ac.nz/handle/123456789/24959
dc.languageen_NZ
dc.language.isoen_NZ
dc.publisherTe Herenga Waka—Victoria University of Wellingtonen_NZ
dc.rights.holderAll rights, except those explicitly waived, are held by the Authoren_NZ
dc.rights.licenseAuthor Retains Copyrighten_NZ
dc.rights.urihttps://www.wgtn.ac.nz/library/about-us/policies-and-strategies/copyright-for-the-researcharchive
dc.titleVariance reduction techniques in the simulation of digital systemsen_NZ
dc.typeTexten_NZ
thesis.degree.grantorTe Herenga Waka—Victoria University of Wellingtonen_NZ
thesis.degree.levelMastersen_NZ
thesis.degree.nameMaster of Scienceen_NZ
vuwschema.type.vuwAwarded Research Masters Thesisen_NZ

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