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The Design of an IEEE 1588 End-to-End Transparent Ethernet Switch

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dc.contributor.advisor Carnegie, Dale
dc.contributor.advisor Smellie, Brian
dc.contributor.author Gordon, Caleb
dc.date.accessioned 2010-06-25T02:58:48Z
dc.date.accessioned 2022-10-13T02:32:31Z
dc.date.available 2010-06-25T02:58:48Z
dc.date.available 2022-10-13T02:32:31Z
dc.date.copyright 2009
dc.date.issued 2009
dc.identifier.uri https://ir.wgtn.ac.nz/handle/123456789/21988
dc.description.abstract In measurement and control systems there is often a need to synchronise distributed clocks. Traditionally, synchronisation has been achieved using a dedicated medium to convey time information, typically using the IRIG-B serial protocol. The precision time protocol (IEEE 1588) has been designed as an improvement to current methods of synchronisation within a distributed network of devices. IEEE 1588 is a message based protocol that can be implemented across packet based networks including, but not limited to, Ethernet. Standard Ethernet switches introduce a variable delay to packets that inhibits path delay measurements. Transparent switches have been introduced to measure and adjust for packet delay, thus removing the negative effects that these variations cause. This thesis describes the hardware and firmware design of an IEEE 1588 transparent end-to-end Ethernet switch for Tekron International Ltd based in Lower Hutt, New Zealand. This switch has the ability to monitor all Ethernet traffic, identify IEEE 1588 timing packets, measure the delay that these packets experience while passing through the switch, and account for this delay by adjusting a time-interval field of the packet as it is leaving the switch. This process takes place at the operational speed of the port, and without introducing significant delay. Time-interval measurements can be made using a high-precision timestamp unit with a resolution of 1 ns. The total jitter introduced by this measurement process is just 4.5 ns through a single switch. en_NZ
dc.format pdf en_NZ
dc.language en_NZ
dc.language.iso en_NZ
dc.publisher Te Herenga Waka—Victoria University of Wellington en_NZ
dc.rights No known rights restrictions other than copyright. en_NZ
dc.subject Synchronisation en_NZ
dc.subject Computer network protocols en_NZ
dc.title The Design of an IEEE 1588 End-to-End Transparent Ethernet Switch en_NZ
dc.type Text en_NZ
vuwschema.contributor.unit School of Chemical and Physical Sciences en_NZ
vuwschema.subject.marsden 290903 Other Electronic Engineering en_NZ
vuwschema.type.vuw Awarded Research Masters Thesis en_NZ
thesis.degree.discipline Electronic and Computer System Engineering en_NZ
thesis.degree.grantor Te Herenga Waka—Victoria University of Wellington en_NZ
thesis.degree.level Masters en_NZ
thesis.degree.name Master of Science en_NZ


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